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Intelligence signals

Compact, information-dense dispatches — strategic observations and analytical notes on the systems we track. Signals are not opinion, blogging or news aggregation; they are early reads on structural change.

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Edge AI & Semiconductors Live30 May 2026 · 4 min
India’s first edge-AI chip is a design-led bet

Kerala’s NetraSemi, backed by Zoho, has unveiled the A2000 — a 12nm edge-AI system-on-chip and the first Indian-designed AI chip to reach silicon. It matters less as a product than as proof of a thesis: edge AI is the one layer of the AI-hardware stack India can contest now, without a leading-edge fab.

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AI Infrastructure Live29 May 2026 · 5 min
Advanced packaging is India’s binding AI constraint

India has built or is building twelve semiconductor projects worth ₹1.65 lakh crore. None of them produces the chips that AI accelerators are made from — because the binding constraint is not the fab, it is advanced packaging.

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AI Infrastructure Live29 May 2026 · 4 min
The Visakhapatnam coastal-AI thesis

The 71% concentration of India’s submarine-cable capacity at Mumbai and Chennai is the single largest geographic risk to Indian AI infrastructure. Visakhapatnam is the one project that materially diversifies it.

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Industrial Opportunity Live29 May 2026 · 5 min
Eight opportunity surfaces from India’s AI infrastructure cycle

India’s AI infrastructure cycle creates a ₹80,000–150,000 crore aggregate Indian-vendor opportunity through 2030. ₹28,000–60,000 crore of it is addressable to SMEs. Eight industrial segments capture most of it.

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AI Infrastructure Live29 May 2026 · 5 min
The corridor logic: why state competition decides India’s AI geography

The unit of competition for India’s AI build-out is the corridor, not the state. Seven corridors are competing for the next decade of hyperscaler and semiconductor capital; their endowments and binding constraints differ sharply.

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Semiconductors Live24 May 2026 · 4 min
India’s Hidden OSAT Bottleneck

Front-end fabrication attracts the headlines, but the binding constraint on near-term output is back-end assembly, test and packaging capacity — and the specialised inputs it quietly depends on.

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Strategic TechnologyMonitoring18 May 2026 · 5 min
Why Talent May Become the Real Constraint

Capital and policy can be assembled quickly. The deep process-engineering and yield-management talent that makes a fab productive cannot — and that asymmetry shapes the realistic ramp curve.

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Industrial InfrastructureDraft · placeholder12 May 2026 · —
Dholera Water Signal

Placeholder — analysis of water sourcing, allocation and resilience dependencies forming around the Dholera industrial corridor. To be published.

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Strategic TechnologyMonitoring12 Jun 2026 · 5 min
Why talent may matter more than subsidies

Capital and policy can be assembled in a board meeting. The deep process-engineering and yield-management talent that makes a fab or a hyperscale DC productive cannot. The asymmetry is what sets the realistic ramp curve.

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Industrial InfrastructureMonitoring19 Jun 2026 · 4 min
India’s hidden industrial water crisis

CGWB classifies Bengaluru and Hyderabad as over-exploited, Chennai as critical. The DC pipeline is densest where the water position is most stressed. This signal names the corridor-level audits that are not yet being published.

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Semiconductor EcosystemsMonitoring26 Jun 2026 · 5 min
The vendor economy behind semiconductor fabs

Of a ₹91,000 crore mature-node fab, roughly two-thirds flows to ASML, AMAT, Lam, TEL and KLA. The Indian-capture economy lives in the remaining one-third — construction, gases, UPW, logistics and the durable industrial capabilities those build.

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AI InfrastructureMonitoring3 Jul 2026 · 4 min
The real constraint behind AI infrastructure

Not capital, not policy, not aggregate talent supply. The binding constraint on India’s 4.5–9 GW DC trajectory is local: transmission, water rights, fibre right-of-way and DISCOM-level interconnection-queue execution at the level of seven specific districts.